With the increased use of mobile devices such as cellular telecommunication products, portable digital assistants, and tablet PCs, the size, weight and cost of individual electronic components and devices are factors critical to a successful design. Integration of several electronic devices into a single semiconductor package has served this purpose by providing composite or co-packaged devices having the same small package form factor of discreet device packages.
It is known in the art to package a pair of power MOSFETs in a common drain configuration with an integrated circuit (IC) in a TSSOP-8 package. One such package 100 is shown in FIG. 1 and includes a first power MOSFET 105, a second power MOSFET 110 coupled to the first power MOSFET 105 in a common drain configuration, and an IC 115. The first and second power MOSFETs 105 and 110 and the IC 115 are shown bonded to a single lead frame pad 120. First and second power MOSFETs 105 and 110 are conventionally bonded to the lead frame pad 120 with conductive epoxy while the IC 115 may be bonded with non-conductive epoxy. A plurality of leads 125 may be provided for connection of the package 100 to a printed circuit board (PCB). Leads 125 may extend outside of an encapsulant body 130 and provide connection to power MOSFET source and gate contact areas and to IC contacts.
A problem associated with the design of composite or co-packaged devices such as package 100 is that heat generated within the package 100 may adversely affect the operation of first and second MOSFETs 105 and 110 and IC 115. Typically, first and second MOSFETs 105 and 110 are designed to operate in a temperature range having an upper limit of 150° C. while IC 115 is designed to operate in a temperature range having an upper limit of 85° C. Considerations of heat conduction and thermal dissipation have led to various solutions in the prior art.
With reference to FIG. 2, a semiconductor package 200 has leads 205 and 210 fused with the lead frame pad 220. The shown configuration provides for a heat dissipation path through leads 205 and 210 which reduces the temperature of semiconductor package 200. Other solutions to the problem of thermal dissipation and heat conduction include bonding the MOSFETs and the IC to separate lead frame pads (not shown). In this configuration, heat generated by the MOSFETs is isolated to some extent from the IC which has a temperature upper limit that is lower than the temperature upper limit of the MOSFETs.
The semiconductor package 200 displays an improved thermal performance over the semiconductor package 100. In the semiconductor package 100, the thermal resistance of the MOSFETs was measured as 213° C./W and of the IC as 208° C./W. When 0.16 W was applied to the MOSFETs, the temperature of the MOSFETs was measured as 59.1° C. and the temperature of the IC as 58.3° C. In contrast, the thermal resistance of the MOSFETs of semiconductor package 200 was measured as 210° C./W and that of the IC as 206° C./W. When 0.16 W was applied to the MOSFETs, the temperature of the MOSFETs was measured as 58.6° C. and the temperature of the IC as 57.9° C. showing the improved thermal performance of semiconductor package 200.
While improvements in package thermal performance have been achieved in the prior art, there is a continued need for a composite TSSOP-8 semiconductor package having improved thermal performance. There is also a need for a package having additional heat dissipation paths.